VHDL design automation using evolutionary computation

In this paper, a method of automatic controller design for electronic control systems is described. In order to automate the design of an electronic controller, an evolutionary computation is applied. First, the framework for applying the genetic algorithm to the automation of controller design is described. In particular, the coding of a chromosome is shown in detail. Then, how to make a fitness function is represented, with an air conditioner as an example, and the controller of the air conditioner is developed automatically using our proposed framework. Finally, an evolutionary simulation is performed to confirm our framework.


Introduction
This chapter describes the automatic generation method of VHDL which lays out the control logic of a control system.This framework releases a designer from the work of describing the VHDL directly.Instead, the designer inputs the equation of motion of a system and target operation.
In this chapter, first, FPGA, CPLD, VHDL and evolutionary computation are outlined.This is basic knowledge required for an understanding of this chapter.Next, the framework of automatic generation of FPGA using evolutionary computation is described.VHDL description is expressed by several kinds of data structures called a chromosome.VHDL expressed in a chromosome is changed using evolutionary computation and changes to a more suitable code for controller purposes.Finally two example applications are shown.The first one is the controller for a simple inverted pendulum.After that, the framework is applied to a more complicated system, an air-conditioning system.The simulation results show that the controller automatically generated using this framework can control the system appropriately.

Computer-aided controller design using evolutionary computation
2.1 FPGA/CPLD/ASIC and VHDL CPLDs and FPGAs are both sorts of programmable LSIs.The internal logic of both can be designed using HDL.The ASIC is one example of a device that can be designed using HDL in the same way as programmable LSIs.CPLDs and FPGAs can be immediately evaluated on the system for the designed logical circuit.In addition, they are flexible for the rearrangement of a specification.These merits make them suitable for the intended use in the case of a rapid prototyping.For this reason, a CPLD is used as a controller.However, the proposed framework is applicable to all devices that can be designed by HDL.VHDL is one of the most popular HDLs and is therefore used in this paper.
The logic described by VHDL is verified and synthesized using a simulator or a logic synthesis tool so that it can be written into a device.When CPLD or FPGA serves as target devices, the programming code which determines the function of the target device can be, through a download cable, written into it in order to obtain the target LSI easily.The VHDL for a simple logical circuit is shown in Fig. 1.

Genetic algorithm
The genetic algorithm used as a basis of this framework is outlined below (Fig. 2).The decision-variable vector x of an optimization problem is expressed with the sequence of N notations s j (j = 1, • • • , N) as follows: It is assumed that symbol string is a chromosome consisting of N loci.s j is a gene in the j-th locus and value s j is an allelomorph.The value is assumed to be a real number, a mere notation, and so on of the group of a certain integer or a certain range of observations as an allelomorph.The population consists of K individuals expressed with Eq. (1).Individual population p(n) in generation n changes to individual population p(n + 1) in next generation n + 1 through the reproduction of a gene.If reproduction in a generation is repeated and if the individual who expresses solution x nearer to an optimum value is chosen with high probability, then the value increases and an optimum solution is obtained (Goldberg, 1989;Koza, 1994).

Evolvable hardware
Higuchi et al. proposed evolvable hardware that regards the architecture bit of CPLD as a chromosome of a genetic algorithm to find a better hardware structure by genetic algorithm (Higuchi et al., 1992).They applied this to myoelectric controllers for electrical prosthetic hands, image data compression and so on (Kajitani et al., 2005;Sakanasi et al., 2004).This approach features coding of an architecture bit directly for a chromosome.The designer must determine which CPLD is used beforehand, implicitly determining the meaning of the architecture bit.If hardware is changed for the problem of circuit scale or structure, it is necessary to recalculate evolutionary computation.
Henmi et al. evolved a hardware description language (HDL) called structured function description language (SFL) and applied it to robot walking acquisition (Hemmi et al., 1997).The basic motion, called an "action primitive", must be designed in a binary string.In our approach, the designer needs only to define I/O pins for CPLD.VHDL rather than an architecture bit is coded directly onto the chromosome, so the chromosome structure does not depend on CPLD scale or type, and after VHDL is generated automatically, CPLD is selected appropriately to the VHDL scale.Pin assignment is set after VHDL generation.

Controller design framework using evolutionary computation
The study of optimizing rewritable logical-circuit ICs, such as CPLD, using a genetic algorithm has increased.The framework that changes an internal logic circuit IC configuration to attain evolution is called evolvable hardware (EHW).With this framework, the designer needs only to define the criteria used to evaluate a controller.We explain the controller design framework using evolutionary computation with XC95144 (Xilinx, 1998)   A chromosome that represents a VHDL assignment statement is shown in Fig. 7.A chromosome structure corresponding to a process statement is shown in Fig. 8.The value currently described is equivalent to the process statement in which "DI009" and "DI014" are enumerated in the sensitivity list.-----------------------------------------------------------------------------  The VHDL description has an if-statement inside of a process statement and the description has two nesting levels.The hierarchy of the list structure is deep compared to the substitution statement.When the gene of such a multilist structure is prepared, it is possible to represent various VHDL expressions.

Variable length chromosome and genetic operations
The structure of a chromosome changes with the control design specification.(((((((((((((((((((((((((( ((((((((((((((((((((((((( ((((((((((((((((((((( the length of the right-hand side of an assignment statement.When dealing with such a variable length chromosome, the problem is that genetic operations will generate conflict on a chromosome.To avoid this problem, we prepared the following restrictions: 1.With a top layer, the length of a chromosome is equal to the number that added one to the summary of the number of internal signals and the number of output signals.
2. All signals are encoded on a chromosome using a reference number.5. Crossover operates on the top layer of a chromosome.
These restrictions avoid the conflict caused by genetic operations.

Application to HDL-based controller of inverted pendulum
In this section an application to an HDL-based controller for the inverted pendulum is described (Kojima, 2011).

Equations of motion
Figure 10 shows the model of the inverted pendulum.The equations of motion are given by is the controlling force, v is the parameter for the control input and K is the gain.J, a and b are defined as: J = J + ml 2 (5) then, equations ( 2) and (3) become: Each parameter can be determined by measurement and experiment as l = 0.15, m = 46.53× 10 −3 , J = 1.58 × 10 −3 , c 1 = 2.05 × 10 −2 , a = 4.44 and b = 2.46 × 10 −1 .Using these parameters, evolutionary simulations are conducted.

Control system and CPLD pin assignment
Figure 11 shows the control system block diagram.The CPLD is used as the controller of the inverted pendulum.The position of the cart and the angle of the pendulum are converted 16 bit digital signals respectively and input to the 32 CPLD pins.The control logic in the CPLD, which is formed using the framework previously mentioned, determines the 10 bit control signal driving the motor of the inverted pendulum.Figure 12 shows the CPLD pin assignment for this application.In this case, 32 bit parallel inputs and 10 bit parallel outputs are adopted.Instead of using them, we can use serial I/Os connected with A/D converters and D/A converters.In this case, serial to parallel logics should be formed in the CPLD and even though serial inputs are used, automatically generated VHDL can be used as a VHDL component.

Fitness
The fitness value is calculated as a penalty to the differences in the rod angle and the cart position.
Disturbances are given as a random torque during the control simulation.When calculating fitness value, disturbance torque is always initialized.Therefore, all individuals are given different disturbance at each evaluation.This kind of disturbance makes the controller robust to various disturbances.

Simulation
Simulations are conducted under two conditions -(1) Population size is 50, mutation rate is 0.5, crossover rate is 1.0, tournament strategy, tournament size is 10 and the elite strategy is adopted.
Figures 13 and 14 show the simulation results.Figure 13 shows the result of condition (1), Figure 14 shows the result of condition ( 2).(a) the result at 0 generation and (b) the result at 1000 generation are represented respectively.The angle of the rod, the position of the cart, disturbance and the control signal are shown at each generation.At zero generation, in both conditions (1) and ( 2), the obtained controller cannot control the inverted pendulum adequately.The rod moves in a vibrating manner at around 180 • .At 1000 generation, the controller controls the inverted pendulum successfully in both conditions.Further, in condition (2), swing up motion can be observed (Fig. 14(b)).The control signal at 1000 generation has more various patterns than the signal at 0 generation.
where G max is maximum flow at full blower opening.Flow rate G 0 is the sum of air flow G a0 and steam flow G w0 .
Water vapour pressure P w0 is as follows: where P s0 saturation water vapour pressure from Tetens' formula (Tetens, 1930): Specific humidity x 0 is given by water vapour pressure P w0 .
x 0 = 0.622 P w0 P 0 − P w0 (15) Air mass flow G a0 is calculated from the following gas equation: where R a is a gas constant.Water vapour mass flow G w0 is given by: Air flow rate G a is constant.Steam flow G w is constant except during dehumidification.
Considering the air flow into control volume (i) from control volume (i − 1) in unit time dt[s], temperature T i , humidity x i and mass of control volume M i after dt is given as follows: where specific heat C i [kJ/kg • K] is given by At the mixture door, air is divided into two flows.The ratio of the mass of divided air depends on the mixture door angle.Here G 1 is the mass flow at location (1) in Fig. 15, G 2 that at location (2) and G 3 that at location (3), where β (0 ≤ β ≤ 1) is the opening ratio of the mixture door.Adding two mass flow rates enables us to calculate the downstream mass at a juncture.Here G 4 is the mass flow at location (4) in Fig. 15, G 5 that at location (5) and G 6 that at location ( 6), Temperature and humidity at a juncture are given in the same way as for when three control volumes are considered.

Predicted mean vote (PMV)
PMV is the predicted mean vote of a large population of people exposed to a certain environment.PMV represents the thermal comfort condition on a scale from -3 to 3, derived from the physics of heat transfer combined with an empirical fit to sensation.Thermal sensation is matched as follows: "+3" is "hot.""+2" is "warm.""+1" is slightly warm.""0" is "neutral.""-1" is slightly cool.""-2" is "cool.""-3" is "cold."Fanger derived his comfort equation from an extensive survey of the literature on experiments on thermal comfort (Fanger, 1970).This equation contains terms that relate to clothing insulation f cl is the ratio of clothed and nude surface areas given by: where T cl is the clothing surface temperature given by repeated calculation of: where h c is the heat transfer coefficient, and T mrt is mean radiant temperature.PMV is detailed in (Fanger, 1970).

Task definition
The task is to adjust PMV in the console despite heat transfer from outside changes.The air-conditioning controller controls the opening ratio of blower n and the opening ration of mixture door m appropriately.

Control system and CPLD pin assignment
Figure 17 shows the control system block diagram.PMV is input to the CPLD as a 8 bit signal.
The control logic in the CPLD determines the 8 bit blower opening control signal and the 8 bit mixture door control signal.Figure 18 shows the CPLD pin assignment for this application.where t end is the end of simulation time.The difference between target and controlled PMV is integrated as a penalty in the controller simulation.PMV also changes simultaneously.This means that simply optimizing a controller is not enough.After 100 generations of calculation, the difference between the target and the estimated value decreases (Fig. 19 (b)).In the 10,000th generation (Fig. 19 (c)), tolerance decreases further.These results show that hardware corresponding to the purpose is obtained automatically using this framework.

Blower
Figure 20 shows simulation results under other conditions.Nine graphs result for three thermal loads.Three graphs -temperature, PMV and control -are shown for each thermal condition.The controller used under three conditions was obtained after 10,000 generations of calculation.Although thermal load and load change timing were random, the blower and mix door were controlled so that PMV is set to zero.

Conclusion
In this chapter, to automate controller design, CPLD was used for controller data-processing and VHDL to describe the logical circuit was optimized using the genetic algorithm.Two example cases (an inverted pendulum and an air-conditioner) were shown and we confirmed this framework was able to be applied to both systems.Since this framework is a generalized framework, so in these kinds of systems which process data from some sensors and drive some actuators, this framework will work functionally.

Fig. 7 .
Fig. 6.Signal definition on the first locus Chromosome

Figure 9 Fig. 8 .
Figure 9 shows an example of crossover operation.The back of the 6th gene is chosen in this example.Chromosome (A) and chromosome (B) cross and change to chromosome (A') and chromosome (B').Only the gene before and behind the crossover point of each chromosome Fig. 9. Crossover operation Fig. 11.Control system block diagram

out std_logic; 052: DO007 : out std_logic; 053: DO008 : out std_logic; 054: DO009 : out std_logic 055: ); 056: end GA_VHDL; 057:
The number of internal signals is set arbitrarily and different descriptions in VHDL are expressed with different locus lengths.The length of a chromosome is determined by the VHDL line count.The length determines the number of internal signals enumerated on the sensitivity list or