Implementation of Low Phase Noise Wide-Band VCO with Digital Switching Capacitors

This paper presents a low phase noise of the complementary cross-coupled voltage-controlled oscillator, which oscillates at a range of 3.64 ~ 5.37 GHz. This VCO utilizes switching capacitor modules in which eight channels are able to be selected. Moreover, MOS varactors are used as fine tuning. The fully integrated VCO provides excellent performance. The bandwidth of frequency is 1.73 GHz and the tuning range is 38%. The power dissipation of the core circuit is 13.7 mW under 1.8 V supply and phase noises all are smaller than -122 dBc/Hz at 1 MHz offset. This VCO was made by TSMC 0.18 mum 1P6M CMOS standard process and the chip area is 0.96 times 0.83 (mm2).


Introduction
In present fast-growing wireless communications, requires wide bandwidth, low-power and low-cost RF circuits [1]. In Fig. 1, it is a simple super-heterodyne transceiver [2], and in this diagram, VCO (voltage-controlled oscillator) is one of the most important building blocks in the wireless communication system. An optimum performance VCO should include low phase noise and wide bandwidth to support several communication standards of wireless transceiver, and low power design technique to enhance the battery lifetime. Recently, the standard CMOS process technology is better choice to overcome low-cost challenge. The choice is also favored by the possibility of system-on-chip integration with digital parts, which should save the total chip area and cost. The VCO with multi-band and wideband are the current trend [3] - [8]. The methods of increasing tuning range are classified as follows, switching inductors or variable inductor [3], switching capacitor modules [4], [5], varactors in parallel [6], [7] and capacitive source degeneration [8]. It is a well-known fact that the Lesson's model of the single-sideband power spectral density is given by [9]: Where FKT is the effective thermal noise with the multiplicative factor F , Boltzmann's constant K, the absolute temperature T; PS is the average power dissipated in the resistive part of the tank; Aft is the offset frequency; QL is the effective quality factor of the tank and is dominated by quality factor of spiral inductor; 0  is the center frequency and the corner frequency of the flicker noise. The model describes well the shape of the spectrum, and realizes that many parameters affect phase noise performance. Circuit design tradeoff of the device parameters is required.

VCO Design
VCO must be designed carefully, its performance affects the stability of the VCO in the transceiver. This section studies how to optimize the circuit design and establish the design procedure for a voltage-controlled oscillator (VCO) in the front end of a transceiver. It promotes the better quality of communication by decreasing the power dissipation and phase noise. This VCO has good data performance between the simulation and measurement.

Design flow of VCO
This VCO was made by TSMC (Taiwan Semiconductor Manufacturing Company) standard 0.18|μm 1P6M CMOS process technology. In Fig. 2, design process can be divided into the following steps: Step 1: Review of related literature, and make design specification.
Step 2: Design passive and active circuit of the VCO topology.
Step 3: It is pre-simulated by Agilent Advanced Design System (ADS) with TSMC 0.18|µm RF CMOS process model and fabricated by TSMC 0.18|µm CMOS technology. It is need to redesign if the pre-simulation result and design goal are different.
Step 4: IC layout design using cadence virtuoso and laker.
Step 5: Layout verification using Calibre DRC (Design Rule Check) and LVS (Layout Versus Schematic).
Step 6: Using the EM simulator with ADS Momentum to perform a numerical electromagnetic analysis of the layout. It is need to re-layout if the post-simulation and pre-simulation results are different.
Step 7: The chip is fabricated by TSMC (Taiwan Semiconductor Manufacturing Company) 0.18|μm 1P6M standard CMOS process technology.
Step 8: The chips are measured on PCB board or on-wafer.

Simple LC Tank VCO Structure
In Fig. 3, we can analyze several important parts of this simple LC tank VCO structure: The part A-LC tank: The tank circuit consists of a high-Q inductor and varactor components. Select the model values of inductor and varactor for control oscillatory frequency. Where, Rp denotes the passive element loss of LC tank. The part B-Active circuit: Active circuit is used to provide negative resistance to compensate for the loss of the LC tank. The part C-Buffer: The buffer is designed to drive the 50 ohm load of the testing instruments.

Schematic of the proposed VCO
In Fig. 4(a) shows the narrowband VCO which is composed of the complementary crosscoupled pair MOSFETs, LC tank and switching tail current transistors. In addition, we add the switching capacitor modules for wideband application in Fig. 4(b). A wide-tuning range VCO usually accompanies large Kvco (gain of VCO, Kvco=doo/dVtune). But large Kvco of VCO will amplify noise on the control node (Vtune) and hence will degrade the phase noise performance. We design the small size of PMOS varactors which are capable of providing a small gain of VCO, an array of binary switching capacitor modules were used to extend the tuning range. In this section we discuss several components such as complementary crosscouple pair, LC tank, switching tail current and switching capacitor modules.

Complementary cross-couple pair
There are three merits in the complementary cross-coupled pair which described as follows [10]: A. Same current existing, the complementary cross-coupled pair offers higher transconductance and faster switching speed on each side.

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Implementation of Low Phase Noise Wide-Band VCO with Digital Switching Capacitors 203 B. The output wave are more symmetrical on each other for rise-time and the fall-time, as debate the noise which comes from low frequency noise, 1/f, transferring to high frequency. C. In all NMOS structure, the channel voltage is larger than complementary case, Therefore, it causes faster saturation speed and larger y value [11].
The simple schematic of NMOS cross-coupled pair is shown in Fig. 5. T1 and T2 indicate NMOS transistors. The high frequency equivalent circuit with capacitive parasitic is shown in Fig. 6(a). And the calculation of input impedance or admittance of the simplified equivalent circuit is shown in Fig. 6(b).
We can obtain the input impedance Z in as following: www.intechopen.com Advanced Microwave Circuits and Systems 204 If the transistors size are the same, we can assume that and gs ds C C  for microwave range in simplified calculation with small dimension device [12]. The Eq. (2) becomes as following: If s j  is used, then Eq. (3) can be written as following: If Eq. (4) in a a Z R jC   , then R a and C a can be expressed as : where, R a is the real part and C a is the imaginary part, respectively. And the parameters of active device are represented in Fig. 7. When the parasitic is ignored, the traditional negative resistance of the input port is indicated by -2/gm. Although the complementary topology has more devices than the NMOS pair, the differential voltage swing is larger for the same current consumption resulting in reduce phase noise. The M1 ~ M4 transistors of a complementary cross-coupled pair are shown in Fig. 4, which yield negative resistance to compensate the passive element loss of LC tank. It can be achieved to start up for oscillation [13] and output signals of the circuit are differential.

Switching tail current
The circuit with a tail current can improve the effect of various noise sources and supply sensitivity [11], and some researchers discovered that a square wave cycling a MOS transistor from strong inversion to accumulation reduces its intrinsic 1/f noise [14]. Therefore, switched biasing can be useful in many circuits to reduce the up-conversion of noise 1/f [15]. The flicker noise from tail current source, especially in MOSFET transistors, makes a great deal of phase noise. Gradually switching tail transistors can release trapped electrons in FET channel, which results in decreasing flicker noise. Moreover, this technique can not only reduce 1/f noise up-conversion but also save power as well. The bias of tail current source was replaced by switched bias without extra DC bias [15] [16]. Utilizing the output voltage swing V1, V2 control M5, M6 which is switched turn on. The output voltage swing is 1.16~1.18V in Fig. 8. In order to determine behavior of the switching, the tail current can't too small. If it is too large, the power consumption is increased, so we need to tradeoff switching behavior, power consumption and phase noise.

Advanced Microwave Circuits and Systems 206
The comparison of simulated phase noise performance between fixed bias and switched bias of different tail current topology is shown in Fig. 9.

LC tank
We establish the simulation parameters of Si-substrate and the circuit models of inductors. The resonating tank causes the current in the tank to be Q times larger. Hence the metal lines connecting the LC tank need to be sufficiently large to withstand the large current [17]. In Fig. 10, the quality factor of inductor in this chip is approximately 11 over the working frequency range. The capacitance range of MOS varactor is wider than junction varactor and the equivalent series resistance of the former is smaller than that of the latter. Because using NMOS varactor that drawback is apt to be disturbed in substrate. NMOS capacitor could not implemented in the separate P-well, so NMOS capacitor has high sensitivity of noise that induced by substrate than PMOS capacitor. In view of this, we adopted PMOS varactor.

Switching capacitor modules
We usually use band switching techniques to expand the tuning range. The gain of VCO (KVCO) can be reduced to improve the phase noise performance. Making use of switching capacitor modules, eight frequency channels are able to be selected. In order to enable eight channels to connect continually, we design the ratio of the capacitance C2, C1, C0 is 4.45:2.09:1. The S2, S1 and S0, digital pads of the chip, connect digital lines so as to switch different channels. The logical high is 1.8V and the logic low is 0V. The switching has less power dissipation by using NMOSFET within 0.3 mW in our practical work. The whole circuit of switching capacitor modules is shown in Fig. 11. Furthermore, the MOS varactor pair tunes the wideband operation within continuous frequency in each channel [18]. Fig. 11. A switching capacitor module

Output buffers
The VCO is sensitive to loading effect, and it output oscillation frequency would be changed by loading variation. If we insert the buffer between oscillator and loading, it can isolate between them, and the variation of the loading will not influence oscillator directly. The load of the instrument for measurement is 50Q such as spectrum analyzer. Without buffers, the chip cannot directly drive instrument. The buffer is shown in Fig. 12. [16].

Devices Size of the Circuit
The devices size of our proposed VCO circuit is shown in Table 1, the devices size that we take an optimization to achieve maximize quality factor and generate a negative resistance enough to oscillation, they improve the performance of this proposed VCO.

Measurement setup
A. Agilent E3631A is used as a DC source for digital switching High/Low. B. Agilent E5052A is used as signal source analyzer and DC sources for DC supply and tuning voltage. C. The photo of chip with pads is shown in Fig. 13(a). D. Above a gold plated FR4 PCB is glued the chip which is bonded aluminum wires, shown in Fig. 13(b). E. The differential outputs of PCB connect a Bias-Tee on each side and then connect two loads, Agilent E5052A and 50Q, shown in Fig. 13(c). F. The wires which connect to instruments are shielded well and properly matched.  Fig. 13 shows that the frequency range, the magnitude of carrier and the current from supply in different value of tuning voltage. From Fig. 14, we know that MOS varactor pair is able to adjust 0.24 GHz and the magnitude of carrier is -5.97 dBm at 1.15V tuning voltage. B. Fig. 15 shows phase noise, -128 dBc/Hz with 1 MHz offset at 4.13 GHz when switching channel is set for S 2 SiS 0 = "100", DC supply at 1.8V, tuning voltage at 0V. C. According to the steps above, the frequency range, phase noise, the magnitude of carrier and the current from supply in different channels are listed in Table 2. Table 2 shows that each channel works well and the current of each channel is almost the same, which means that the circuit operates in high stability within switching operation. Therefore, we may well say that the usage of switching capacitor modules is a good way to design the wide-band VCO.  The supply voltage is set at 1.8V and S 2 SiS 0 = "111", we attained 1.8V x 15.8mA = 28.5mW. Disconnecting two loads, we get the core power dissipation 13.7 mW at DC supply 1.8V. It is a well-known that figure of merit (FOM) is an index between different VCOs. FOM is defined as [10]   0 20 log 10 log l www.intechopen.com

Implementation of Low Phase Noise Wide-Band VCO with Digital Switching Capacitors 211
Where   L f  is the phase noise at Af offset from the carrier f 0 and P is the core power dissipation. Table 3 shows the comparison with recently reported papers VCOs.

Conclusion
This VCO presents a technique of operating narrowband into wideband, employs switching tail current technique and maintains the good phase noise performance. The switching capacitor modules offered multi-channels can enhance oscillator frequency range and the KVCO is still small. This VCO operated from 3.64 to 5.37 GHz with 38% tuning range. The power consumption is 13.7 mW by a 1.8 V supply voltage and measured phase noise in all tuning range is less than -122 dBc/Hz at 1 MHz offset.

Acknowledgment
This project is support by National Science Council, (NSC 95-2221-E-224-102). We would like to thank the Taiwan Semiconductor Manufacture Company (TSMC) and Chip Implementation Center (CIC) for the wafer fabrications. We are grateful to National Nano Device Laboratories (NDL) for on-wafer measurements and National Chung Cheng University for PCB measurements by Dr. Ting-Yueh Chih.